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Altera_Forum's avatar
Altera_Forum
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14 years ago

Max V Hardware Implementation

This is the first time I'm implementing a CPLD and so I came here looking for some advice. The following schematics show how I've wired the JTAG connector and also the bypass caps. I intend to run al...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

Thanks, I'll take a look at JTAG again.

I had another question: None of the implemented logic in the CPLD requires an external oscillator. It's just a 100-bit shift register that sends data out serially when it receives a clock signal from a microcontroller.

So, my question is - does the CPLD still need an external oscillator or can I have a fully working CPLD for my application without one?