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MAX V Exposed pad solder reflow problem
- 1 year ago
Thanks for your response, I now transition this thread to community support. This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.
Hi,
stencil thickness is usually chosen by the assembly service provider depending on PCA technology and used pad range. As mentioned above, problem with EQFP package is the 0.05 to 0.15 mm range of exposed pad clearance. If the parts have typical 0.1 mm clearance, 120 µm standard stencil thickness should work, but for maximal 0.15 clearance you'll probably want a thicker stencil, e.g. 180 µm if it's still compatible with small pads used on the board.
I'm presuming that you have industry standard reflow profile as suggested in AN353, because another possible reason for solder failure is "cold solder joint".
Regards
Frank
- Nakaj1 year ago
New Contributor
Thank you for your reply.
your answer is very helpful.
Regards
Nakaj