Max V CPLD

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Does Max V CPLD has inbuilt ADC or DAC. If yes then how can i interface it with CPLD. :)

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As Leon points out, Altera CPLDs and FPGAs do not have ADCs and DACs.

You can however create a DAC using a PWM waveform and low pass filter (Altera have an app note on this), or an ADC using an LVDS receiver (Lattice have an app note on this).

There are plenty of SPI ADCs and DACs from multiple vendors. They are very simple to interface to. I can post examples.

What kind of speed/update-rate were you looking for?

Cheers,

Dave