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Altera_Forum
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15 years ago

Max v cpld dpll

Hi All, I am new to the Altera CPLDs. Come from the X-Company side of things. The Max V CPLD looks really cool. What with user Flash memory, Internal programmable Oscillator, low power states. Is...
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Altera_Forum
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15 years ago

Hi All,

Thanks for chiming in. How does the "instantiating optional IP" generally work with the A devices? Is it one within Quartus, like Megacore function maybe??

With X devices it is done by Coregen. But Coregen is restricted to FPGAs only not for the Coolrunner-II CPLDs.

thanks

Ananth