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Altera_Forum
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15 years ago

Max v cpld dpll

Hi All, I am new to the Altera CPLDs. Come from the X-Company side of things. The Max V CPLD looks really cool. What with user Flash memory, Internal programmable Oscillator, low power states. Is...
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Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

The DPLL feature on MAX V devices is interesting. However, the overview page has this note:

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Note:

1. Digital PLL is an optional intellectual property (IP) that can be instantiated into unused LEs.

--- Quote End ---

So is it just an IP feature? No specific silicon support? If that is the case, then why it is specific and restricted to MAX V?