Max II UFM Data Synchronisation

Hi, i want to use the UFM memory in MAX II ( parallel interface ) like the component declaration:

component data_flash is

port

(

addr : IN STD_LOGIC_VECTOR ( 8 DOWNTO 0);

di : IN STD_LOGIC_VECTOR (15 DOWNTO 0);

nerase : IN STD_LOGIC;

nread : IN STD_LOGIC;

nwrite : IN STD_LOGIC;

data_valid : OUT STD_LOGIC;

do : OUT STD_LOGIC_VECTOR (15 DOWNTO 0);

nbusy : OUT STD_LOGIC

);

end component;

This parallel interface is asynchrounus to my system clock.

It is advisable to use a register chain ( two register to avoid metastability ) for the data_valid and or nbusy signal

to take the outgoing data into my register ?

thank you,

Nicolas