Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

Max II startup glitch

Hi I have created a PCB using a Max II EPM240T100I5N for a state machine + logic. It works 100% except for the fact that the outputs are high for 100us in duration (1 clock cycle) at startup. ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

It's very simple. According to the datasheet, MAX II I/O pins have pull-up resistors, that source up to 300 uA in unconfigured state. This also apply to the short intervall between power-up and entering user mode. Usually a 1-2k pull-down resistor is sufficient to override the weak pull-up. Another option is using active low outputs and external inverters.