Honored ContributorDoes anyone know the max gpio speed for the cyclone II, III, and IV ?
I know the ram speed for the II is close to 240 mhz and the IV is close to 450 mhz, i dont know the gpio speed for any though, Thanks chasemayer
Honored ContributorHopefully I am asking the right question and not been sold a bill of goods to upsale me, my experience is limited to PIC proccessing but I am looking for the right proccessor with alot of speed in the gpio area.
Honored ContributorIf you are talking about a PIO on a system with a Nios CPU it depends on many factors, mostly the CPU type, its frequency, the memory type and interface connected to the CPU instruction master port, the amount of cache and the kind of software environment you will build your application upon.
If you really want high speed input/output you should consider using a DMA instead of a PIO component.Honored ContributorI Want to control a PATA SSD with it at high speeds (over 60 megabytes a second)
Honored ContributorI built a PIC18f based system that controlled a compact flash using GPIO, The cyclone III has a end GPIO of about 250 MHZ from digging around the internet, I think this would be best for my project, what do you think ?
Honored ContributorThe FPGA itself is certainly capable of such speeds, but you won't be able to reach it by controlling the SSD in software and PIOs. You will need a dedicated controller with DMA support, such as this one (http://www.cast-inc.com/ip-cores/storage/ataif/cast_ataif-a.pdf).
There is also an opensource core at opencores (http://opencores.org/project,ata) but IIRC only the first one (PIO mode) is fully stable.Honored Contributorshot in the dark here, is there any way to LVDS to a sata DMA controller?
Honored Contributorsecond question, do you know where to get a inexpensive cyclone III starter board with alot of pins still open ?
Honored ContributorThe regulal LVDS pins aren't fast enough for SATA. You need an FPGA with transceivers for that, such as an Arria, or one of the Cyclone/Statix GX variants. Have a look here (http://www.altera.com/technology/high_speed/protocols/sata-sas/pro-sata-sas.html).
As for an inexpensive starter board with pins, you can have a look at the bemicro (http://www.arroweurope.com/markets-solutions/solutions/bemicro/bemicro.html) (careful, IIRC this board uses a special kind of RAM that requires a licensed core) or the Cyclone IV de0-nano (http://www.terasic.com.tw/cgi-bin/page/archive.pl?no=593) board. I'd recommend the DE0-Nano. It has 72 I/O pins from what I can read.Honored ContributorI decided to make my own cyclone III board with altium designer. Do you know which pins can be used for the JTAG header ? Also should I include extra program data space on a eeprom ? All the kits i see have extra eeprom.
Honored ContributorSee the Cyclone III literature, more specifically the configuration chapter.
Also, triple check your pin assignment with the pin connection guidelines and by compiling a mock up project. There are many possible mistakes when designing such a board... If you want to run NIOS or something like that, yes, you should leave extra room the in the configuration ROM. They're cheap, anyway. Like Daixiwen metioned, the regular LVDS outputs on a Cyclone III aren't no where fast enought for SATA (1.5 Gbps at least). You'll need either to use a FPGA with transceivers *or* find yourself a cheap PCI to SATA controller chip such as SiI3114.
