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Altera_Forum's avatar
Altera_Forum
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10 years ago

MAX 10 project ---- fpga reset

I have a tutorial for the SLS SD/emmc card open core

so far i have populated all the pins but one... it is called fpga_reset_n but also reffered to in the top level verilog file as being pll_reset,

what should i tie it to ? is is an input

does the fpga reset when it is pulled to a binary 1 or does it reset when it is dropped to a binary 0.

and if it is binary 0 can i connect it to VCC on the pin planner without any problems ? thanks !

5 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    10 years ago

    Hello,

    This IP core is managed by System Level Solutions (SLS). Hence I recommend you to directly drop an email to [email protected] regarding your query. They can help you in this.

    Cheers,

    Bhaumik
  • Altera_Forum's avatar
    Altera_Forum
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    10 years ago

    i would if i could... i think they are on vacation, it has been awful slow contacting me back

  • Altera_Forum's avatar
    Altera_Forum
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    10 years ago

    Hi chasemayer2,

    First of all,I am sorry for any inconvenience caused to you.

    fpga_reset_n is active low signal.While pll_reset is active high.

    You can provide ground to pll_reset signal or you can use ~fpga_reset_n.

    You can download reference design from the following link

    https://cloud.altera.com/devstore/platform/15.1.0/usb-sd-card-mass-storage-design/

    If you still have any doubt you can contact us at [email protected].

    Waiting for your positive feedback

    Thanks,

    Krupesh
  • Altera_Forum's avatar
    Altera_Forum
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    10 years ago

    ok thanks ! you guys have been so helpful so far, i really appreciate the good work you guys put into the tutorial i am reading. i will email you guys if i have any more problems. by the way the board i am using the BEMICROMAX 10 from arrow, has no extra ground pins, will any old ground do ? I am having to power the sd card from a seperate battery pack and regulator.