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Altera_Forum
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10 years ago

MAX 10 project ---- fpga reset

I have a tutorial for the SLS SD/emmc card open core so far i have populated all the pins but one... it is called fpga_reset_n but also reffered to in the top level verilog file as being pll_reset...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

Hi chasemayer2,

First of all,I am sorry for any inconvenience caused to you.

fpga_reset_n is active low signal.While pll_reset is active high.

You can provide ground to pll_reset signal or you can use ~fpga_reset_n.

You can download reference design from the following link

https://cloud.altera.com/devstore/platform/15.1.0/usb-sd-card-mass-storage-design/

If you still have any doubt you can contact us at [email protected].

Waiting for your positive feedback

Thanks,

Krupesh