Forum Discussion
Altera_Forum
Honored Contributor
8 years agoBack to the basics. The schematic in post# 1 makes no sense, the relevant point for possible JTAG overshoot is the USB cable supply voltage, not the pull-up resistor voltage. You have JTAG connector pin 4 connected to 3.3V, this might, if at all, be causing overshoot problems with long JTAG traces. The suggestion in the MAX 10 Design Guidelines is to power the USB cable with 2.5V, consequently the pull-up resistors will be connected to the same voltage.
As previously stated, I won't provide an additional 2.5V supply in a single supply MAX 10 design (unless it's used for other purposes, e.g. LVDS IO). I prefer silicon or schottky clamp diodes for the JTAG port, e.g. one of the popular 6-pin ESD protection diode networks.