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Altera_Forum
Honored Contributor
Honored ContributorMAX 10 in place of Cyclone IV
Well, this seems fine to me, but I thought I'd ask the experts before doing it: I've made a VHDL design that's currently working on a Cyclone IV E. It uses the internal RAM (dual port mode), ab...
Altera_ForumHonored Contributor
Honored ContributorOK, try to write some code which has some pre-initialized memory and then compile it.
I did it myself for NIOS on-chip memory that holds the compiled NIOS program code. If I used a chip with no analog features, the compilation flow did not complete and showed errors about this issue.
