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Anandhu's avatar
Anandhu
Icon for New Contributor rankNew Contributor
19 days ago

MAX 10 FPGA Programming Failure via JTAG – nSTATUS & CONFIG_DONE as No Connect

Title: MAX 10 FPGA Programming Failure via JTAG – nSTATUS & CONFIG_DONE as No Connect

Hello Community,

I am unable to program my Intel MAX 10 (10M08SAU169C8G) via JTAG using USB Blaster on Quartus Prime 24.1 (Windows 11).

 

HARDWARE CONFIGURATION:

• nCONFIG → Pulled HIGH to VCCIO 

• nSTATUS → No Connect 

• CONFIG_DONE → No Connect 

• CONFIG_SEL → No Connect 

 

WHAT I TRIED:

• Unchecked "Enable nCONFIG, nSTATUS, and CONF_DONE pins" in Device Pin Options

• Unchecked "Enable CONFIG_SEL pin" and "Auto-restart after error"

• Recompiled and reprogrammed

• USB Blaster recognized ✅

• MAX 10 detected in JTAG chain ✅

• Correct .SOF file selected ✅

 

Despite all this, programming still fails.

 

QUESTIONS:

1. Are NC config pins the root cause even in JTAG mode?

2. Is there a Quartus workaround without a PCB re-spin?

3. Recommended pull-up values for nSTATUS and CONFIG_DONE?

 

Any help is appreciated. Happy to share schematics or screenshots.

 

Thank you!

Configuration
Programmable Logic Device

3 Replies

  • FvM's avatar
    FvM
    Icon for Super Contributor rankSuper Contributor
    18 days ago

    Hi Anandhu,

    According to MAX® 10 FPGA Configuration User Guide, nCONFIG, nSTATUS, and CONF_DONE pins need pull-up resistors (standard 10k) in all configuration schemes including JTAG configuration. Although they are dual-purpose pins, their state is read during configuration phase. I'm not aware of a method to bypass this function.

    You may try if "Halt on-chip configuration controller" option in Quartus programmer has an effect, but I guess it doesn't in this case.

    Regards Frank

    • FakhrulA_altera's avatar
      FakhrulA_altera
      Icon for Regular Contributor rankRegular Contributor
      9 days ago

      Hi Anandhu,


      Yes, the NC config pins are very likely the cause.
      For MAX 10, nCONFIG, nSTATUS, and CONF_DONE must have pull‑up resistors even when using JTAG programming. These pins are still checked by the configuration controller, and floating pins can cause programming to fail. Quartus options cannot bypass this requirement.
       

      Typical pull‑up value is 10 kΩ to VCC.
      Without adding these pull‑ups, JTAG programming is unreliable.
       

      Regards,
      Fakhrul

      • FakhrulA_altera's avatar
        FakhrulA_altera
        Icon for Regular Contributor rankRegular Contributor
        5 days ago

        As we haven't received a response to our previous notification, this thread will be transitioned to community support. We hope all your concerns have been addressed. If you have any new questions, please feel free to open a new thread to receive support from Altera experts. Otherwise, community users will continue to assist you here. Thank you.