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yzhu12's avatar
yzhu12
Icon for New Contributor rankNew Contributor
2 years ago

MAX 10 CPLD VCCIO design consieration

Hello, there We have read that For the V36 package of the 10M02 device, the VCCIO of these groups of I/O banks must be the same: — Group 1—banks 1, 2 and 8 — Group 2—banks 3, 5, and 6 We ar...
AqidAyman_Altera's avatar
AqidAyman_Altera
Icon for Regular Contributor rankRegular Contributor
2 years ago

Hi Yuanchen Zhu,


Thank you for reaching out Intel FPGA Community.


Based on Intel® MAX® 10 FPGA Device Overview, V36 package refers to Wafer-Level Chip Scale (WLCSP) package with 36 pins.


I believe the part number that you interested in is not included in the mentioned condition because it is not the V36 package.


For more information on the MAX 10 Device ordering information, refer to this link: https://www.intel.com/content/www/us/en/docs/programmable/683658/current/device-ordering-information.html


I hope this information helps you moving forward.


Regards,

Aqid