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Altera_Forum
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8 years ago

MAX 10 10M02SCU169C8G The output port doesn't initialize as I programmed

Hi Guys,

I am new in this field so I don't have much experience. I assigned my output port to 0 like this:

module acm_top

(

....output bmc_csa_l,

output bmc_csb_l,

.....

);

....

assign bmc_csa_l = 1'b0;

assign bmc_csb_l = 1'b1;

...

The synthesized circuit acted right after I programmed the chip but the next time I powered up the circuit, it set bmc_csa_l tohigh which is not acting as my code.

I did try to assign this port to a register and reset it but my circuit lacks the reset input and it still not worked

module acm_top

(

....output bmc_csa_l,

output bmc_csb_l,

.....

);

...

reg [1:0] rbmccs;

...

assign bmc_csa_l = rbmccs[0];assign bmc_csb_l = rbmccs[1];

...

always @ ( posedge core_clk or posedge rst )

begin

rbmccs[0] <= 1'b0;

rbmccs[1] <= 1'b1;

end

....

It's not just this two pins didn't work, some other pins as well. Did anyone experience same issue? Please help me solve this problem, thanks!

2 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    You can check the FPGA's configuraion pins nStatus, Config_Done value to check the mode of FPGA is user mode or not.

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    --- Quote Start ---

    You can check the FPGA's configuraion pins nStatus, Config_Done value to check the mode of FPGA is user mode or not.

    --- Quote End ---

    It turned out I programmed the wrong image. I supposed to programmed .pof file but I programmed .sof file.

    Stupid me. Thanks for the reply though.