Honored ContributorHi there,
Is there a compiler which can convert Matlab code directly in to VHDL/verilog format so to implement the code directly in to FPGA? I am trying to write codes on MATLAB and would like to convert the code in to verilog format so to make my life easier.:) thnks
Honored ContributorI already posted a link to tools and docs on this thread. Did you read it ?
What did you not understand ?Honored Contributorthanks for the instant reply Amilcar,
I went through the Altera website you provided the link for and also downloaded the DSP builder add-on but is there any tutorial or examples that I could try replicating in simulink or matlab and implement it directly on to my Altera FPGA so to get better understanding of the code and mechanic. I basically learn better by following examples that can be implemented. :)Honored ContributorOkay here is some more information on the project that I am working on, I am student from BITS pilani university who is working on a project in which I want to apply Noise cancellation technique on to Altera FPGA using Digital Signal Processing in Matlab. I have the Algorithm for noise cancellation on Matlab but configuring FPGA with matlab is one major issue I am facing, but before I begin, I am trying to implement a low pass filter on to my FPGA using simulink, since I read online that this can be done easily on simulink, I have the ideas and plan on how to progress in my project but I lack technical knowledge in this field. I may have to learn Verilog and also need to know how to implement filter design on to a FPGA, I need any good tutorial or examples that could help me learn Verilog especially when it deals with filters and some examples that were already implemented on to an FPGA.
Maybe now you could better understand my problem :)Honored ContributorNo you do not need to learn VHDL nor Verilog. DSP builder does the job for you. Just use the library blocks that it provides and push the download buton.
Honored Contributorthanks amilcar, but could you give me any suggestion on what should I do first to make sure that my FPGA is properly interfacing with simulink,,,,Should I begin by making a LP filter?
Honored ContributorA counter is good. And then use ChipScope to test it.
Honored ContributorHello
I read your posts and i was wondering if you succeeded. I have been trying to do the same and am stuck at it. I have a code on MATLAB and want to translate it to Verilog(Not VHDL).Please let me know if you had success at it. ThanksHonored Contributoru can check the below link for converting Matlab to verilog
Matlab to c or c++ 1) http://www.mathworks.com/matlabcentral/newsreader/view_thread/270407 2) http://www.mathworks.com/matlabcentral/newsreader/view_thread/235465 C to verilog http://www.c-to-verilog.com/Honored ContributorThanks alot saurabhraj
I want to explain a bit on what i have to do. I am using a MATLAB code for SPIHT image compression and i have individual files for each step, since SPIHT proceeds in several phases Dominant pass, Subordinate pass etc.. Now i was thinking if i could translate each file in to an individual module of Verilog. The links you sent me suggested converting to C and then to Verilog. It seems fairly undertandable to me, sadly I have zero experinece with C and do you think this will slow down the code? As in two steps will give significant delays? ThankyouHonored ContributorYes, you will gets tons of delays and bad performance from such a system (automated conversions).
That is the reason that HDL engineers are well paid, but then again it takes a couple of years practice to be a good HDL coder. There is no such thing as "free meal" with automated converters. On the other hand if you use simulink model instead of matlab .m scripts as an entry language, then the translation to hardware is easy and straightforward. And even the automated tools can do a good job. That is why I told you guys to use "DSP builder" for simulink. But somehow you do not believe me. No problem, you are young, you will learn (the hard way) :) Good luck transforming .m into c and c into HDL.
