Forum Discussion
Altera_Forum
Honored Contributor
16 years agoMaster reset and nconfig
Hi, We have a deisgn with iMx27 and 3 cyclones. The 3 have their FPP configuration pins connected to the iMX. During power on reset, the iMX has to hold low the 3 FPGAs until is ready to send c...
Altera_Forum
Honored Contributor
16 years agoThanks a lot for your quick answer. How about nSTATUS signal in FPP where the POR time is between 3 to 9ms; do the iMX needs to pulled it low for the time of boot (I mean before configuration)? or the FPGA can be left in this stage waiting for the configuration to start by iMX without controlling any config pins?:confused:
Thanks MJ