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Altera_Forum's avatar
Altera_Forum
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16 years ago

Master reset and nconfig

Hi, We have a deisgn with iMx27 and 3 cyclones. The 3 have their FPP configuration pins connected to the iMX. During power on reset, the iMX has to hold low the 3 FPGAs until is ready to send c...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

Thanks a lot for your quick answer. How about nSTATUS signal in FPP where the POR time is between 3 to 9ms; do the iMX needs to pulled it low for the time of boot (I mean before configuration)? or the FPGA can be left in this stage waiting for the configuration to start by iMX without controlling any config pins?:confused:

Thanks

MJ