Forum Discussion
Altera_Forum
Honored Contributor
17 years agoIf your design is synchronous you simply don't care about those unknown states, because those values of your output will be evaluated only at some clock edges.
So you should care only about the values of your result in correspondence of your active edges of the clock, and ignore what's happening in between them. If your design is asynchronous, you'd better shift to a synchronous design, so add a clock that acts to synchronize all the state changes in your machine and give reliable results at every clock edge.