m25p26

It could be a good idea to check the signals on the flash with an oscilloscope to see if there is any hardware problem. You can also configure the FPGA with an SFL image and try to access the flash through the JTAG connector.

As for your Nios design, there could be a number of reasons, such as timing problems on your FPGA project, bad clock input, or processor kept into reset (be careful with the reset signal, the reset_n port created by SOPC builder is active low, not high).

You could try to do a simpler design first, with no CPU and just a flashing led as an example, to check that the FPGA and its clock source are working properly.