LVDS resistor termination in Cyclone III

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Thanks for answering.

Please could you told me where the hardware manual is clear (is that on page 7-27)?

I have miss something... and I want to read it carefully.

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Page 6-20 of the cyclone III handbook:

The LVDS standard does not require an input reference voltage, but it does require a

100-Ω termination resistor between the two signals at the input buffer. An external

resistor network is required on the transmitter side for top and bottom I/O banks.

Page 7-8 of the cyclone III handbook:designing with lvds

Cyclone III device family I/O banks support LVDS I/O standard. The left and right

I/O banks support true LVDS transmitters. On the top and bottom I/O banks, the

emulated LVDS transmitters are supported using two single-ended output buffers

with external resistors. One of the single-ended output buffers is programmed to have

opposite polarity. The LVDS receiver requires an external 100-Ω termination resistor

between the two signals at the input buffer.

Success, Ton