Forum Discussion
ShivaKi
New Contributor
1 year agoHello,
Related to Question 1 response, for example, a FPGA IO pin(pair) to be used as LVDS Differential Transmitting signal purpose, What is the I/O Standard to be selected for this differential pair pins in Pin Planner Quartus Prime software?
Is it LVDS or SSTL-2 Class I ? Please confirm