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Altera_Forum's avatar
Altera_Forum
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12 years ago

LVDS input on MAX V CPLDS?

The guide for the MAX V CPLDs only states that it supports LVDS output. It does not explicitly mention supporting LVDS input.

My assumption is that LVDS input is not supported, however, it would be nice to be sure.

Can anyone enlighten me?

Thanks

1 Reply

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    12 years ago

    Essentially, you're right. However, to expand slightly...

    Max V CPLDs support an 'Emulated LVDS Output Standard'. By driving an external resistor network, along with a further resistor at the input of the remote LVDS receiver, they can support LVDS links.

    They do not support LVDS directly on their input pins in the same way various FPGA families do. If you want to drive LVDS signals into a MAX V CPLD you will need an external LVDS receiver.

    Refer to application note 636 for more information:

    http://www.altera.co.uk/literature/an/an636.pdf (http://www.altera.co.uk/literature/an/an636.pdf)

    Regards,

    Alex