Forum Discussion
Altera_Forum
Honored Contributor
9 years agoThank you for your quick answers. The board is quite old, I know, but there are existing libraries to talk with my IC for this specific FGPA. In any case I guess I will give it a try.
--- Quote Start --- go ahead and atleast create a dummy project with pin assignments and constraints for what you are planning and see if there is some subtle rule preventing it from ever working --- Quote End --- Short question about this: Since the FPGA is supporting LVDS which kind of rule should prevent me of doing this? Has Quartus some specific rule set for FPGAs on its dev/starter kits?