Forum Discussion
Altera_Forum
Honored Contributor
Honored ContributorLUT help!!!
I have wrote this code for implementing a neural network.What it does is to take some values(inputs) and some weights and computes the SUM(values*weigths).What i want to do is to check if the total s...
Altera_ForumHonored Contributor
Honored ContributorFor reference, the above two bits of code produce exactly the same bits of hardware.
For your question - yes you can - that is exactly what VHDL is for. On each clock edge you sample the inputs at that instant in time. This will NOT do a rolling accumulate though, if thats what you indented to do. There is no memory from clock cycle to clock cycle.
