LPM_ROM, I am a newbie please help.

--Look at this....

--You need the PORT MAP after the begin. I am not sure this will work for you

--but it is definitely closer.

LIBRARY ieee;

USE ieee.std_logic_1164.all;

LIBRARY lpm;

USE lpm.lpm_components.all;

LIBRARY altera_mf;

USE altera_mf.all;

ENTITY LPM_ROM_MEGAFUNCTION IS

PORT( A_address :IN std_logic_vector (7 downto 0);

Sclk :IN std_logic;

Data :OUT STD_LOGIC_VECTOR (0 DOWNTO 0));

END LPM_ROM_MEGAFUNCTION;

Architecture Behavioural of LPM_ROM_MEGAFUNCTION is

component Variation1

PORT (

address : IN STD_LOGIC_VECTOR (7 DOWNTO 0);

clken : IN STD_LOGIC := '1';

clock : IN STD_LOGIC := '1';

q : OUT STD_LOGIC_VECTOR (0 DOWNTO 0)

);

end component;

--SIGNAL Signal_1, Signal_2, Signal_3 :std_logic;

BEGIN

--address => A_address,

--clock => Sclk,

--q => Data

THE_COMPONENT_YOU_WANT: Variation1

PORT MAP ( address => A_address,

clock => Sclk,

q => Data

);

End Behavioural;