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Altera_Forum's avatar
Altera_Forum
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11 years ago

Lpddr sdram

Currently, we are using Cyclone lV FPGA for one of our project. Presently we would like to interface LPDDR SDRAM with Cyclone lV FPGA. Let us know if Cyclone lV supports LPDDR SDRAM.

Best Regards,

Mayur Akbari

4 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    11 years ago

    Cyclone V specifically advertises it's support of LPDDR memory. Can I ask why you're not considering Cyclone V?

    Altera's LPDDR2 SDRAM controller IP 'is not supported by family cyclone iv e', as stated should you try to instantiate it. However, Cyclone IV supports all the I/O standards required for LPDDR. So, you could always write your own IP...

    I recommend you take the easier, Cyclone V, route.

    Cheers,

    Alex
  • Altera_Forum's avatar
    Altera_Forum
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    11 years ago

    LPDDR is not the same as LPDDR2, and I am not aware of any Altera IP for any device that natively supports LPDDR.

    Yes, Cyclone IV supports LPDDR I/O standard (1.8V). BeMicro SDK is one development board you can purchase with Cyclone IV and LPDDR device to do your development on.

    You can license a controller from a 3rd party, modify the Altera clear text as needed, or write your own from scratch.
  • Altera_Forum's avatar
    Altera_Forum
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    11 years ago

    Hi

    I am trying to create LPDDR3 on Cyclone V. I know that Cyclone V don't support PHY for LPDDR3, so I try to integrate soft IP for LPDDR3.

    Now, I am using dq_dqs2 to create PHY, but I can't find any documents or information to integrate on Cyclone V.

    I want to ask: Is there any information or experiment work on PHY.

    Thanks.

    by Kyle