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Altera_Forum
Honored Contributor
15 years agoLow Voltage Input
Hi! I want to feed an SDI Signal with a maximum high level of 800mV into an ALTERA CYCLONEII. Unfortunatly the FPGA does not recognize this low voltage in my project. Is there an option, ma...
Altera_Forum
Honored Contributor
15 years agoCyclone II differential LVDS inputs have a specified common mode voltage of 0.1 to 2.0V. Thus they should be able to receive a 0.8V signal with the negative input connected to a reference voltage of e.g. 0.4 V.