Altera_ForumHonored Contributor14 years agoLow pass filter realization using VHDL Hi all, May I know what should I do in order to design a LPF using VHDL which: a. cutoff frequency fixed at 10 kHz. b. input is from conventional function gen. c. output is...Show More
Altera_ForumHonored Contributor14 years agoYou need to learn DSP techniques first. Start by studying DSP and filters.
Recent DiscussionsRegarding Power-Up Sequence for Agilex 5Cyclone V SoC 5CSXC6 Series GXB Utilization and LimitationsHow to tell Quartus my Arria10 target system CLKUSR frequency is 100MHz?Agilex 3 PLL in Source Synchronous mode ?writing a word to cfm1 using on chip flash ip on max10