Loop index overflow problem

Hi there,

I've wrote a little VHDL program in Quartus II.

I'd like to separate one big std_logic_vector into small fix-length std_logic_vectors

and the compile told me that the index is out of range, very strange...

source code:

===================================================

load_p:process(i_clk,i_datain)

variable p_count:integer range 0 to 8*8*i_width; --i_width is a constant

variable p:std_logic_vector(i_width-1 downto 0);--buffer of one data

begin

p_count := 8*8*i_width-1; --counter for index

for i in 0 to 63 loop

p := datain(p_count downto p_count-i_width+1); --buffering

(line 30) p_count := p_count-i_width; --get next line index

end loop;

end process;

=======================================================

the compiler says:

Error (10528): VHDL error at df_loader_p.vhd(30): value "-1" is outside the target constraint range (0 to 512)

Help me out , thx!!!:(