Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Loop index overflow problem

Hi there, I've wrote a little VHDL program in Quartus II. I'd like to separate one big std_logic_vector into small fix-length std_logic_vectors and the compile told me that the index is out...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

ok, then i 've changed the P_count to increasing order, problem still...

p_count := 0; --counter for index

for i in 0 to 63 loop

p := datain(p_count+i_width-1 downto p_count); --buffering

p_count := p_count+i_width; --get next line index

end loop;

and the compiler says:

Error (10528): VHDL error at df_loader_p.vhd(30): value "512" is outside the target constraint range (0 to 511)

T.T