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Altera_Forum
Honored Contributor
14 years agoMy DE1 has a S29AL032D70TFI04 4Mx8bit 70ns Flash.
I believe this must be hard wired into byte mode, as there is no such thing as a FL_BYTE_N pin in the DE1 pin map import file. I have a T80 (Z80 clone) in my design, and I have mapped the Flash into its memory space. I run the clock real slow, so as to avoid needing wait states, and so as not to violate the Flash timings. FL_RST_N <= '1'; FL_CE_N <= '0'; FL_OE_N is lowered when I need to read from it. FL_ADDR(12 downto 0) <= A(12 downto 0); -- so I'm not screwing up the addresses FL_ADDR(21 downto 13) <= (others => '0'); -- well, it is effectively fixed tduring the test FL_DQ is driven on a write, but 'Z' when a read, allowing the Flash to drive it. When I read back (I've never written), the each byte returned is the negation of the bottom byte of the address. This suggests to me I am reading something other than random static. Can anyone confirm the factory default content of the Flash? I have delayed the falling_edge of FL_WE_N signal to 40ns after the clock upon which the T80 asserts the address, data and WR_n signal, so as to be sure the address and data is stable before FL_WE_N falls, so that when the Flash reads the address, it is good. I've tried erasing sectors, programming bytes and even something as simple as reading the device ID. I can't seem to get the unlock sequence to work. I'm using the byte command sequences in the datasheet, eg: for reading device ID, in Z80 assembler I have LD A,0AAH LD (8AAAH),A LD A,055H LD (8555H),A LD A,090H LD (8AAAH),A LD A,(8002H) This returns 0FEH, ie: -02H, rather than 0F9H as expected in the Flash datasheet. I've tried using other sectors (in case it ships with the top and bottom ones locked). Can anyone confirm other aspects of the factory shipped configuration of the Flash? What could I have missed? {{{ Andy