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Honored Contributor
Honored ContributorLinking of two FPGA
Hi all, I'm a student of Engineering of Telecommunications.In my thesys I must realize a digital circuit on FPGA,but I can't make it all on the same FPGA board,because of occupation of resources.S...
Altera_ForumHonored Contributor
Honored Contributor --- Quote Start --- thanks for the feedback. . if i use single core wires to connect the quartus FPGAs..anyone knows of a typical clock cycle rate? cause my ALU is suppose to do something every posedge clock. good luck to me.... --- Quote End --- i once used 50Mhz(slow) as the clock rate by dividing my board clock and it was working.
