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Altera_Forum
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18 years ago

LFSR as counter in VHDL

I am running a bit low on gates in a VHDL design, and I am replacing a counter implemented by addition with a counter implemented as an LFSR. The main crystal is 3.6864 MHz and the counter needs to h...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

Hi,

It is interesting but I believe it is purely academic.

In practice, flexible counters are too easy to design. Resource is too small to spare. It may help when using lots of counters but I used memory to implement 120 x 12 bit counters in one occasion to avoid using as many registers.