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Altera_Forum's avatar
Altera_Forum
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18 years ago

LFSR as counter in VHDL

I am running a bit low on gates in a VHDL design, and I am replacing a counter implemented by addition with a counter implemented as an LFSR. The main crystal is 3.6864 MHz and the counter needs to h...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
18 years ago

The last bit should always be a tap but I think for a 20 bit lfsr you want taps from from bits 17 & 20 and not from bit (3). I think there is some kind of mirror effect for maximal length taps so you can have either 3 & 20 or 17 & 20, I'm 100% about that last bit though.

eg

hb_lfsr <= hb_lfsr(19 downto 1) & (hb_lfsr(17) xor hb_lfsr(20));