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Honored Contributor
Honored ContributorLFSR as counter in VHDL
I am running a bit low on gates in a VHDL design, and I am replacing a counter implemented by addition with a counter implemented as an LFSR. The main crystal is 3.6864 MHz and the counter needs to h...
Altera_ForumHonored Contributor
Honored ContributorI think you need to xor bit(20) as well.
For a decent reference try http://en.wikipedia.org/wiki/linear_feedback_shift_register
