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Altera_Forum
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18 years ago

LFSR as counter in VHDL

I am running a bit low on gates in a VHDL design, and I am replacing a counter implemented by addition with a counter implemented as an LFSR. The main crystal is 3.6864 MHz and the counter needs to h...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
18 years ago

Why is an LFSR going to save you gates? A counter should use the carry-chain, and probably be the optimal size, i.e if you need 2^20 count, then it should only be 20 logic cells. You really can't store that much information with fewer bits, unless I'm missing something. Is there anything else that has a counter running, because resource sharing might be your best bet.