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Altera_Forum's avatar
Altera_Forum
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10 years ago

LE and memory blocks in a cyclone

Hello, I'm quite new in the world of the FPGA, indeed, I'm an engineer student in end-of-studies internship which is about using a FPGA. Well, I'm telling you that because I guess that you wi...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

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Without having your design, we cannot say how to optimise it.

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Well, actually my question wasn't right.

I just want to know if it is possible to choose between LEs and memories blocks for an IP?

In fact, you didn't answer one of my first question which was : "what is the constitution of a memory block?".

Indeed, I easily find the constitution of a LE on the internet : http://www.ccciss.info/ciss420/ch2/cyclone.le.png

But I don't manage to find something who explain how a memory block is made.

At beginning, I was thinking that memory block was LEs already assemble to form an internal memory for the FPGA.

Now, it seem like I was wrong.