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I find memory bits not very useful, unless building really big RAMs and you might approach full efficiency.[...] You can build a memory out of logic, but it is really inefficient. For example, a 512x16 would not onlyr require 8K registers just to hold the bits, but you would have sixteen 512X1 muxes to read it, plus write address decodes to write each address. This adds a ton of support logic and runs really, really slow. Most of the time it's just not worth it, but it it possible in theory.
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My problem is that with only 2 FIFO and 1 FFT on my cyclone IV, I'm approaching full efficiency of memory bits. But I use only 1/10 LEs of the FPGA.
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Some FPGA dev boards also have simple to use parallel static RAM.
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But the goal of my internship is to implement a fully programmed FPGA (and only this device) on another system. So I can't use any peripherals available on the board.
However, I would like to know: If I use an external memory of FPGA chip, wouldn't FPGA be really slower than if I used only the internal memory?
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