Altera_Forum
Honored Contributor
Honored ContributorKonvert a Vhdl File
Hello
I'd Like to ask if it's possiple to observe the Logic Hardware Configuration from a VHDL File Thanks Nadja :confused: :confused: :confused:Forum Discussion
2 Replies
Altera_ForumApp Note 379 provides a reference design that can be used to read/write/erase data (including configuration data) stored in an active serial prom (EPCS1, EPCS4, ... , EPCS64). There is a pdf that documents the design and a zip that provdes source:
http://www.altera.com/literature/an/an379.pdf http://www.altera.com/literature/an/an379.zip This design could be instantiated in a VHDL design. There is no documented way to directly read the SRAM configuration bits once they are loaded into the FPGA.- Altera_Forum
Please try rephrasing your question as I connot quite understand what you are really asking to be able to do.
