I do not think knowing K-maps and other hand optimizations is useless when synthesis engines can do this for you. Blindly letting your tools do all your work for you can sometimes make you a lazy designer so having an understanding of hand optimizations is still a good thing if you ask me.
K-maps when you draw them out also give you a good idea how FPGAs implement combinational logic since FPGAs implement combinational logic this using lookup tables. Often the optimizations that you perform by hand using K-maps isn't needed in FPGAs since the FPGA lookup tables implement every combination of an output signal of the function.