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Altera_Forum
Honored Contributor
Honored ContributorJTAG timing constraints
Hi, Over the years my company has made many Altera FPGA designs, and for a long time the way-of-work for JTAG constraints remained undefined and of little consequence. Then for a couple Arria ...
Altera_ForumHonored Contributor
Honored ContributorHi,
--- Quote Start --- "Error 16328: Put the device in User mode …" Thanks, --- Quote End --- This error is because CRC mismatch. 1.Try to DISABLE it and program. Check session 3.6.2 https://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/hb/max-10/ug_m10_config.pdf or try to program using both the methods (By using on-chip ram / by using on-chip flash) https://www.youtube.com/watch?v=0k4azmdw9sk Best Regards, Anand Raj Shankar (This message was posted on behalf of Intel Corporation)
