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Altera_Forum
Honored Contributor
9 years agoJTAG timing constraints
Hi, Over the years my company has made many Altera FPGA designs, and for a long time the way-of-work for JTAG constraints remained undefined and of little consequence. Then for a couple Arria ...
Altera_Forum
Honored Contributor
8 years agoCould there be any Voltage regulation issue? I am using LM1117 chips for 2.5V and 3.3V supplies.
Part nos are LM1117MPX-3.3/NOPB and LM1117MPX-2.5/NOPB Scope is showing values between 3.36 - 3.40 and 2.56 – 2.60V. So there is about 4mV swing / ripple on each of the supply. Thank you,