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Altera_Forum
Honored Contributor
15 years agoJTAG programming with blank EPCS16
I have two PCBs, a master and slave, each with a Cyclone III FPGA on it. The JTAG pins of the slave board are connected to IO pins on the master board. The first board has an Ethernet connecti...
Altera_Forum
Honored Contributor
15 years agoperhaps the following document may help you
http://www.altera.com/literature/an/an425.pdf table 2 use the do_halt_on_chip_cc command