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Altera_Forum
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9 years ago

Jtag Errors -> Reducing JTAG frequency on Arria V / Terasic USB blaster ?

Hi,

I use Jtag to program and debug an Arria V: 5AGXBB1D4F40C5 (nios programming, check nios printf(), signaltap II, ...) on a custom board.

I am using Quartus 16.0.0 build 211 Standard Edition on w7 x64. with a Terasic USB blaster (usb-blaster-B on pcb).

I have some errors:

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Error (12852): Data integrity error is detected during JTAG communication. The SignalTap result is not trustworthy. Please check the JTAG chain.

--- Quote End ---

So I tried to lower the Jtag frequency to get better results but I can't:

--- Quote Start ---

$ jtagconfig --setparam "USB-Blaster [USB-1]" jtagclock 6M

No parameter named jtagclock

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maybe it is not possible regarding this link:

https://www.altera.com/support/support-resources/knowledge-base/solutions/rd11142008_293.html

Is there any solution to enhance the jtag connection?

Thanks in advance.
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