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Honored Contributor
Honored ContributorJTAG configuration over fiber link
We are deploying a Cyclone III FPGA in a remote location, connected to the infrastructure by a 30m long duplex optical fiber pair. TDI, TCK, TMS are sent to the remote FPGA, TDO comes back on the ret...
Altera_ForumHonored Contributor
Honored Contributor --- Quote Start --- I had hoped not to have to reinvent the wheel if it had already been done. --- Quote End --- I fear, the problem is somewhat special. JTAG speed of FPGA is basically limited. You rarely have interfaces with multicycle delay.
