Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

JTAG BST Cyclone III

Hi, Can anyone help understand this condition for nconfig "The IEEE Std 1149.1 BST circuitry for these Altera devices are dedicated and enabled upon device power-up. You can use this IEEE S...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

The same condition can be found in any other Altera FPGA manual. I'm not sure, what it means in detail, particularly which BST functions are possibly unavailable when not pulling N_CONGIG low. However, why don't you simply consider to load an empty configuration at begin of the boundary scan test via JTAG? Furthermore, the boundary scan test behaviour is partly modified by the actual I/O configuration. You may want to set a particularly configuration during test anyway.