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Ad13's avatar
Ad13
Icon for New Contributor rankNew Contributor
5 years ago

JTAG - CLK Pin limited to 0.7V

I have 2 x custom boards with 10CX085YU484E6G and a MT25QU01GB flash device that have been working fine. However, for some reason Quartus changed the device and when I last programmed the FPGA and F...
NurAiman_M_Intel's avatar
NurAiman_M_Intel
Icon for Super Contributor rankSuper Contributor
5 years ago

Hi Adrian,


Apologize that previous answer did not solve your issue.


  • Since you mention that it work previously, is the design compiling in new Quartus? or any change when compiling the design?
  • Where did you measure the JTAG clock? is it the 10 pin header on board or the output from USB Blaster?


Regards,

Aiman