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Altera_Forum
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14 years ago

Jitter estimation on Arria II Gx devices

Hi everyone, I want to estimate jitter on various clocks used in my FPGA design. My device is an Arria II Gx FPGA. Input clock : 80 MHz Jitter : 1 ps (RMS) Output clock 1 : 100 M...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

Thanks for your answer.

I get a warning for the ALtmemphy DDR-2 controller complaining that the jitter might be too high though...

I'll have to double check and make sure I will be able to use the DDR-2 with a 100 MHz generated from a PLL compared to one generated from a crystal.