Forum Discussion

mwf's avatar
mwf
Icon for New Contributor rankNew Contributor
3 years ago

Issue with updating ARIA 10 PCIe core to 20_1_1

We are migrating to a new hardware design server and are converting existing FPGA designs from Quartus 17.1 to Quartus 22.3. We have a number of PCIe Gen 3 x 8 designs that build without issue and ru...
Wincent_Altera's avatar
Wincent_Altera
Icon for Regular Contributor rankRegular Contributor
3 years ago

Hi,


If not all fail, that normally means not the example design or IP issue.

Based on my experience on of the possibility is the dip switch had been adjusted and not in the default.

Please confirm on it.


Let me know if still cannot solve.


Regards,

Wincent_Intel


  • mwf's avatar
    mwf
    Icon for New Contributor rankNew Contributor
    3 years ago

    Hi. Can you explain further about the dip switch? I am sorry but I have no idea what you are referring to.

    Thanks,

    Mike