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TNguy162's avatar
TNguy162
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6 years ago

Issue of using F2H bridge on Arria 10 to access H2F_LW.

Hi everyone, I have an issue related to using F2H bridge to access registers on FPGA via H2F_LW bridge. As I read from the Arria 10 HPS technical reference manual, from the address table of page 37...
EBERLAZARE_I_Intel's avatar
EBERLAZARE_I_Intel
Icon for Regular Contributor rankRegular Contributor
6 years ago

Hi Joe,

I am not that familiar with the clock crossing that you mentioned. I believed if the Platform Designer automated the adapter, it should be fine because of the two different clock domain frequencies.

Was there any issue with the adapter so far?

TNguy162's avatar
TNguy162
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6 years ago

Hi el.ign,

Thanks for your reply.

I think the same. We ran simulation and tested on board. There is no problem so far but I'm just worried about meta-stability. That happens occasionally and hard to detect on board.

Best regards,

Joe

  • EBERLAZARE_I_Intel's avatar
    EBERLAZARE_I_Intel
    Icon for Regular Contributor rankRegular Contributor
    6 years ago

    Hi Joe,

    Let me check for any information I could find and check with out internal team regarding this.

    Best Regards.